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Note: Please apply exclusively via our direct application link hosted by Empfehlungsbund and MINTbund.de: https://en.mintbund.de/jobs/275878/senior-rf-ic-design-engineer-rx-focus-immediate-start-in-dresden. We are looking forward to meet you!
We are seeking qualified RF IC designers to work on the next generation DECT NR+ microchip. You will be part of a dynamic RF, analog/mixed-signal team engaged in design and productization utilizing cutting-edge FD-SOI process technology nodes.
- Understand system level requirements to create overall specifications.
- Create behavioral models to drive architectural decisions and derive block-level requirements for analog and digital blocks.
- Work closely with the layout design team to implement layout views of designs.
- Top-level simulations.
- Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timing requirements.
- Define production/bench-level test plans for post-silicon characterization.
- Work with lab engineers in taking lab measurements to validate IP.
- Review ATE and lab test results to resolve yield issues and drive bug fixes.
- Work with system teams in system bringup and debug.
- Hold design reviews of blocks with peers/management to show design meets spec targets and requirements.
TOOLS, TECHNOLOGIES AND REQUIREMENTS
- Completed studies in electrical engineering or a comparable qualification
- Experience in the area of RF/Analog IC design with advanced CMOS technology nodes. Experience in 22FDX is a plus
- Understanding of RFIC circuit design. Direct tape-out experience with one or more of the following blocks: RF front-end circuits, PA, LNA, mixer, oscillator, PLL, LO, VGA, filter, TIA, and/or other baseband analog blocks in deep sub-micron CMOS technology
- Knowledge of analog design concepts such as analysis of noise, linearity, mismatch, stability and other analog impairments
- Familiar with CMOS device physics, RF device modelling, device noise parameters, inductor modelling
- Insights into packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum RF performance
- Familiarity with various RF transceiver architectures and their trade-offs, as well as calibration methods used for different RF transceiver architectures
- Familiarity with Cadence Virtuoso, Spectre RF, EMX and similar tools
- Understanding of system specifications and ability to work with system architects to translate system requirement into circuit requirement at IC level
- Experience in Silicon characterization and debug
WE OFFER
- Working in a fresh Start-Up where we do new wireless System-on-Chip design from scratch
- You have the opportunity to actively shape a future technology – Non-cellular 5G network can be deployed anywhere, anytime, by anyone!
- Permanent position with a high level of personal responsibility and excellent development opportunities
- Work in an international, friendly and motivated team, which will be happy to support you in all questions
- Flat hierarchies, we are open to change and welcome your ideas
- An appreciative corporate culture characterised by a high degree of team spirit and trust, regular team events
- An attractive salary, additional benefits to your salary and corporate benefits
- Free job or Germany ticket or job bike (monthly allowance of € 55) as well as free use of the gym in the building.
- Bright and comfortable office space in a central location (close to the main train station and TU Dresden)
- Fresh coffee, fruit, juices or a beer after work? You are welcome to help yourself!
Short profile of Last Mile Semiconductor GmbH
Based in Dresden, Germany – the heart of Silicon Saxony – we are a semiconductor startup for the breakthrough development of a new non-cellular 5G wireless chipset that enables secure massive IoT use cases.
Driven by a vision of a future where technology is seamlessly integrated into our daily lives, encompassing homes, industries, public spaces and healthcare, we strive to optimize resource and energy consumption while establishing global digital sovereignty. To realize this vision, we are actively developing a low-cost and ultra-low-power 5G wireless chipset based on the revolutionary NR+ non cellular private 5G standard.